NMOS High Side Switches

In various switching power electronics, it is common to see four N channel enhancement mosfets connected in an H configuration with the load making the horizontal bridge and each mosfet making up half of the the long vertical sides.

There are a few issues with getting those high side mosfets to turn on. N channel enhancement mosfets become conductive when their gates are raised to a certain voltage above their sources. This is no problem for the low side FETs because their sources are connected to ground. So you just need to apply a 5-15V voltage with respect to ground and those FETS are on. But what happens if you try that with the high side? Well, once one of the low side FETs is on, the load gets pulled down to ground voltage on both sides. This lowers the source voltage on the high side FETs to a level where the 5-15V above ground is enough to turn it on. But there is a problem. If the high side FET turns all the way on like that, it’ll have such a small voltage drop from drain to source that the source voltage can be too high. About as high, in fact, as whatever the main high voltage is. And if this is higher than the 5-15V on the gate, that high side FET will start to turn off, but not necessarily all the way. It’ll stay on exactly enough to keep the source voltage low enough to stay as on as it is. This can easily burn up the transistor, depending on the load impedance. If the load impedance is 1 Ohm, and main voltage is 24VDC, the FET gate threshold is 3V, and the gate voltage is 10V, then the transistor needs to have enough impedance such that the voltage to the load is about 7V. Thus, the resistance of the transistor will set itself to around 3.4 Ohms. Trouble is, with that resistance at that voltage, the transistor has to dissipate 92.7 Watts which is enough to rapidly overheat and destroy any FET that doesn’t have some serious active cooling, and even if the FET can survive the heat, the load is still only getting 7V out of 24V, and only 38W of power. That’s no good.

One alternative is to use the high main voltage at the gate of the high side FET. In the last example, if you did this, the load would get closer to 21V, the FET still has to dissipate 63W, but the load gets a decent 442W. This is better, but it’s no where near as good as the FET can do.

The best method is to apply a voltage to the gate of the FET that is 5-15V higher than the high main voltage. This can be produced in a number of ways using switched devices, and if one is clever, and is driving the gates with a PWM wave, then one can use that switching to get the high side FET gate voltages up. The only problem with that is that if the duty cycle gets too close to 100%, then you end up right back in the second situation above, with massive heating of the high side FETs. A more flexible method would be to source the voltage for the gates from a separate boost converter with its own internal switching, but this is a more expensive choice.

Finally, there are a few P-channel power mosfets that can be driven a little easier, requiring only the high main voltage and a voltage 5-15V lower than that. This is problematic for two main reasons. Firstly, the timing is different. When using all of the same N channel FETs, you know they all have the same switching delays, with the P channels, you can expect different switching delays. Secondly, for the highest power electronics, P channel devices aren’t available (technically N channel FETs are also unavailable, but IGBT’s operate similarly to N Channel FETs).

Leave a Reply