Timing Stage Block

While working on the DC Current Limiter, I realized I had a need for a unitized timing stage circuit that I could just drop in as required when multiple time dependent tasks need to be completed in sequence.  This circuit does that, it’s a capacitor charged with a voltage controlled current, that triggers outputs when the capacitor voltage reaches a fixed threshold.  It also has inputs which disable/pause charging and an input to trigger drain of the capacitor which resets the timer.  It has two 400mA form C outputs.  The timing isn’t linear with respect to the input voltage which is an issue I may revisit at a later date.

Timing Stage BlockTiming Stage Block.png

Time to Trigger ~= (6*C1)/(TIME_DELAY*2.4/500)   where C1 is the capacitance of the timing capacitor.

Which is precalculated on the following chart for a 25uF capacitor (note that 0 volts has a special value due to opamp range limitations and built-in voltage drops, and similarly, voltages greater than 4.3V will not have a lower trigger time.) :

Time Data.png

Add (0.8 to 2ms) to these times for the delay required to turn on the opto-relays.

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